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As systems move toward higher voltage levels and greater power density, the three-level SST — with better harmonic characteristics, lower switch voltage stress and higher overall system efficiency — is a perfect fit for high-capacity, medium/high-voltage solid state transformers and has become an important direction of industry evolution. Modeling Tech launches the industry's first full-topology real-time simulation solution for three-level solid state transformers (SST)! For the first time, this solution uses a distributed multi-simulator collaborative architecture to realize hardware-in-the-loop (HIL) testing of the entire three-level SST system, from the front-end cascaded rectification to the back-end high-frequency DC/DC conversion, filling the gap in complex real-time simulation for the development of high-capacity, high-frequency SSTs.
The platform adopts a distributed multi-simulator collaborative architecture: the master simulator runs the front-end three-level cascaded circuit in real time with a 1 μs time step, and the slave simulators accurately simulate the back-end high-frequency DC/DC converters of each phase with an extremely small 100 ns time step. High-speed real-time data interaction between the simulators through fiber links, complemented by dedicated clock synchronization lines ensuring strict system-level synchronization, forms a high-precision, strongly consistent unified virtual controlled plant, providing the controller with a closed-loop test environment close to real operating conditions.
The master simulator simulates the front-end three-level cascaded circuit with a 1 μs time step, and multiple slave simulators accurately simulate the back-end high-frequency DC/DC converters with 100 ns small time steps; electrical quantities are transmitted with low latency and strong noise immunity through fiber, and clock synchronization is guaranteed by clock synchronization lines, achieving accurate whole-system simulation of the solid state transformer.
StarSim FPGALab achieves 100 ns small-step simulation of DC/DC converters, greatly improving the simulation fidelity of high-frequency devices.
Supports flexible combinations of front-end NPC, ANPC and other three-level rectifier topologies with back-end DNPC, SHB LLC and other high-frequency resonant converters, meeting the testing needs of multiple scenarios.
The solution provides full-spec I/O, fiber and other interface options, and can directly connect to mainstream SST controllers from manufacturers.
The figure shows the power, current and voltage waveforms under different load steps; under sudden changes of different pu loads, the transient response waveforms of the grid-side current, DC-side voltage and power are smooth, and the dynamic regulation process is highly consistent with the theoretical design.
Under 800V→750V→800V→700V→800V command steps, the DC bus voltage adjusts quickly without overshoot, showing excellent system tracking characteristics.
The figure shows the upper and lower capacitor voltages of all sub-modules; the voltages remain highly balanced under all operating conditions, with small voltage deviations among the 8 modules per phase — the voltage balancing algorithm is verified with high fidelity.
At a 50 kHz switching frequency, the high-frequency inductor current waveform of the three-level four-switch DC/DC converter (amplitude, phase and commutation inflection points) is accurately reproduced in the real-time environment, with nearly lossless transient details.
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