
StarSim SPE Solver is a real-time simulation modeling solver tailored for special high-frequency applications with high switching frequencies. It adopts RonRoff modeling for high-frequency switches and conducts in-depth underlying FPGA optimization for circuit topologies, which drastically shortens simulation time steps and cuts communication latency, enabling more accurate simulation of high-frequency application models.
Currently, it supports DC/DC converter topologies including Boost, Buck, FSBB and Phase-Shifted Full Bridge, with FPGA-implemented simulation time steps no more than 160ns.
It currently supports DC-side topologies such as Boost, Buck, FSBB and Phase-Shifted Full Bridge, with the simulation time step of all DC-DC topologies capped at 160ns.
SPE Solver significantly reduces the latency from DI to AO. Paired with high-speed I/O boards, it supports simulation of converters with switching frequencies up to 100kHz.



Experimental Topology
In this experiment, the DC input voltage V1 = 800 V, the transformer turns ratio n = 1:1, leakage inductance Ls = 100 μH, phase shift angle = 72°, load resistance Rl = 25 Ω, switching frequency fs = 100 kHz. The theoretical DC output voltage is 240 V.
The output voltage waveform obtained with SPE Solver is shown below. It can be observed that the real-time simulation results are basically consistent with theoretical calculations.

When matched with a 5 MSPS AO board, AO waveforms can be output at an ultra-high sampling rate.
SPE Solver undergoes special optimization to greatly reduce the latency from DI to AO.

To facilitate waveform observation on the host software, the new version upgrades the sampling rate of the HIL Scope, supporting a maximum sampling rate of 2 MSPS.

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