Users can view compiled bitstream data and interactive interface information on the FPGA panel. Online viewing of resource utilization reports and timing reports generated during FPGA model compilation is also supported.

Mapping between UI panel parameters and the device CPU can be completed with simple mouse clicks, making all input-output relationships clearly visible at a glance.

Users can freely build custom monitoring dashboards, add or delete widgets including oscilloscopes, waveform graphs, text boxes and images, and adjust model parameters online. All interfaces defined within the model can be visualized on oscilloscope widgets.